• Awarded Project Details

    The Synopsis for this Awarded Project is detailed below: 

    General Information


    Project ID: 

    MOE-000805-00

    Project Title: 

    Enabling Extremely-Low Power AI Hardware using Novel Ferroelectric Capacitive Synapse and Arrays

    Principal Investigator (PI): 

    GONG XIAO

    Host Institution (HI): 

    National University of Singapore

    Project Start Date: 

    01-Aug-2025

    Project Duration: 

    36

    Abstract: 

    The increasing amount of data and demands for data-centric computing call for the emerging non-volatile memories (eNVMs) with high data storage density, fast speed, low power consumption, and decent reliability. So far, major research activities in eNVMs have been focused on resistive memory devices, e.g., RRAM, PCM, MRAM, FTJ, and FeFET, which modulate the device conductance by various approaches to store the data. However, the read current of the devices leads to static power consumption, limiting the power efficiency of the storage or in-memory computing system. In this proposal, we will explore a new concept and solution using capacitive memory based on doped-HfO2 ferroelectric material which has the following key features and advantages: (1) Different from the conventional resistive memories, the novel ferroelectric capacitive memory (FCM) modulates the capacitance to store data, enabling the further reduction of power consumption with near-zero static power in principle. (2) With the ultra-high resistance, the IR drop problem faced by the resistive memories can be circumvented. Negligible read disturbance is possible as the large readout signal for sensing the memory states can be maintained even at zero DC bias with charge-based readout scheme. (3) Write power can also be optimized by reducing the leakage current which is irrelevant to both the reading and the field-driven ferroelectric switching. (4) Such concept and device enable computations to be executed by injecting and accumulating the charges in the capacitors, circumventing the need for DC signals. The charge domain operation is able to achieve zero static power in the array, further making the FCM promising as the technology enabler for the ultra-low-power computing-in-memory (CiM) edge computing system. We will focus on the development of a high-performance, low-power, and scalable ferroelectric capacitive memory device as the artificial synapse for AI applications, leveraging the unique properties of HfO2-based ferroelectric materials and the capacitive storage mechanism. The project consists of hardware and software development and can be divided into four sub-programs, involving the studies at material, device, and array levels. The studies at each level are highly correlated, which will be conducted through experiments, as well as the assistance of modeling and simulation. Details of the sub-programs are: Sub-Program 1: Optimizing HfO2-Based Ferroelectric Materials Sub-Program 2: Developing High-Performance Ferroelectric Capacitive Memory Device Sub-Program 3: Modeling of Ferroelectric Capacitive Synapse for Device Optimization and High-Level Evaluation Sub-Program 4: Integrating the Ferroelectric Capacitive Synapse into Crossbar Array The proposed project will provide comprehensive development guideline, understanding, and evaluation of FCM as a promising synapse device for ultra-low power AI applications, which would revolutionize eNVM-based CiM, particularly for resource-constrained environments like edge computing in the internet-of-thing (IoT) devices. Our proposed work would cut across the disciplines of materials, devices, simulation, modeling, circuits, and systems, and is highly relevant to Singapore’s vision of building a strong semiconductor industry. The project is also aligned with major industry stakeholders.

    Keyword: 

    Semiconductor devices, Non-volatile memories, Ferroelectric, AI hardware

    Data Access Contact: 

    Project Website: 

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Last Updated on: 14/4/2018 6:45 PM